Whole System Energy Transparency University of Bristol

Current Work

Energy model

Steve Kerrison has previously worked on an instruction set level energy model for the XMOS XS1-L architecture. He is now working to expand this model to include communication and I/O costs as well as the complete instruction set. Steve's work focuses on reliably collecting instruction level energy data that can then be used with instruction set simulation statistics. The profiling data can be used to guide higher-level ENTRA models, and the simulation-time modelling provides an additional comparison point between real hardware energy and the various modelling levels.

Kyriakos will also create a new energy model based on effective capacitance of each instruction. The benefits of this model are:

  • Accumulating energy gures parameterized to the actual clock frequency and core supply voltage  
  • Need to calculate capacitance and number of clock cycles associated with the execution of a function operating on fixed data only once  
  • Using this you can calculate the energy-consumption for function-specic frequencies and voltages  
  • Decouples the estimation of the eective capacitance and the number of clock cycles for the execution of individual functions from the overall voltage and frequency dependent time and energy gures  
  • Allows exploration of dierent voltage/frequency operating modes  
  • Communication is integrated into the XMOS ISA and using the capacitance will allow a uniform representation of energy consumption model for all instructions


Kyriakos Georgiou is currently working on mapping the LLVMIR to the XCORE ISA code. This is needed because the current energy model is on the ISA level and in order to provide with actual energy values the resource analysis at LLVMIR level we need a good mapping. The first attempt to map them is through the debug line informations under optimization level -O0. Several other ideas are being under examination like a mapping through regression analysis.

Assertion Languages

Neville is also collaborating with the other partners to define a common assertion language for expressing energy and timing properties in languages used by the embedded software design community. In particular, this language will allow the expression complex specifications including energy consumption functions which depend on data properties (such as data size), other environmental properties (such as clock frequency and voltage) and inter-module contracts. The assertion language will be multi-purpose, used for analysis, optimization, and verification and debugging of embedded systems, allowing (energy) information flow between different components of the integrated tool set.