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Multimedia Instruction Sets

As data widths in high-performance processors increase to 64 bits, it is becoming clear that for a large class of computationally intensive problems where data is typically short, normal coding means the arithmetic units are running well below full efficiency, e.g. only 25% when processing bytes on a 64-bit machine.

In recent processors (HP PA-RISC, Sun Ultra-Sparc, SGS-Thomson Chameleon, Intel MMI) the demands of multimedia processing (particularly video de-compression) have spurred designs of instructions which operate on multiple data values 'packed' into a longer word, thus gaining factors of 2-4x in performance. These instructions operate in a strict SIMD fashion, concentrating on simple arithmetic and logic. Whilst they are primarily driven by needs of multimedia, they have general utility when processing data structures with strong array forms.

At present, software for these multimedia instruction sets is being developed using assembler-level programming tools. This has the usual disadvantages: it is time-consuming, the programs are unmaintainable, the programs are not portable. Although there are some libraries under development, it is not conceivable that any library could offer a programmer the full potential of the instruction sets. In addition, unless the library itself were developed using high-level tools, it would be unmaintainable and not portable.

This project is to investigate 'high-level' tools and compiler technology which can target these multimedia instruction sets. There are four areas of interest:

Staff and Students

David May, John Lumley (HP), Andy Sturges (ST)
Neil Pollard, and Richard Phillips.

Publications

Collaborators

Hewlett-Packard and SGS-THOMSON Microelectronics.

Support

Hewlett-Packard Research Laboratories Europe, Bristol, and
SGS-THOMSON Microelectronics.