An exploration of mechanisms for dynamic cryptographic instruction set extensionPhilipp Grabher, Johann Großschädl, Simon Hoerder, Kimmo Jarvinen, Dan Page, Stefan Tillich, Marcin Wojcik, An exploration of mechanisms for dynamic cryptographic instruction set extension. Cryptographic Hardware and Embedded Systems - CHES 2011. ISBN 978-3-642-23950-2, pp. 1–16. September 2011. PDF, 256 Kbytes. External information
Instruction Set Extensions (ISEs) supplement a host processor with special-purpose, typically fixed-function hardware components and instructions to utilise them. For cryptographic use-cases, this can be very effective due to the demand for non-standard or niche operations that are not supported by general-purpose architectures. However, one disadvantage of fixed-function ISEs is inflexibility, contradicting a need for "algorithm agility". This paper explores a new approach, namely the provision of reconfigurable mechanisms to support dynamic (run-time changeable) ISEs. Our results, obtained using an FPGA-based LEON3 prototype, show that this approach provides a flexible general-purpose platform for cryptographic ISEs with all known advantages of previous work, but relies on careful analysis of the associated security issues.
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