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Simon Hollis - Publications List

Simon Hollis

Publications List

Journal papers

Jawar Singh, Dhiraj K. Pradhan, Simon Hollis and Saraju P. Mohanty, A single ended 6T SRAM cell design for ultra-low-voltage applications, IEICE Electroncs Express, Vol.5, No.18, pp.750--755, September 25, 2008. PDF version

Fully refereed conference papers

Simon J. Hollis and Chris Jackson, When does Network-on-Chip Bypassing Make Sense?, 22nd IEEE SoCC Conference, September 2009. PDF version

Simon J. Hollis, Pulse Generation for On-chip Data Transmission, 12th Euromicro DSD Conference on Digital System Design, August 2009. PDF version

J Singh, D K Pradhan, S Hollis, S P Mohanty, J Mathew, Single Ended 6T SRAM with Isolated Read-Port for Low-Power Embedded Systems. 12th IEEE International Conference on Design Automation and Test in Europe (DATE), April 2009. No electronic version available.

Simon Hollis and Simon W. Moore, RasP: An Area-efficient, On-chip Network, 24th International Conference on Computer Design (ICCD), October 2006. PDF version

Simon Hollis and Simon W. Moore, An Area-efficient, Pulse-based Interconnect, IEEE International Symposium on Circuits and Systems (ISCAS), May 2006. PDF version

Simon Hollis and Simon W. Moore, An Asynchronous Interconnect Architecture for Device Security Enhancement, 19th International Conference on VLSI Design, January 2006. PDF version

Workshop papers

Chris Jackson and Simon Hollis, Initialisation and Synchronisation for a Dynamic Topology Network-On-Chip Architecture., UK Async Forum, September 2009. PDF version

Suleiman Abu Kharmah and Simon Hollis, Reconfigurable High-speed Asynchronous I/O Ports for Flexible Protocol Support, UK Async Forum, September 2008. PDF version

Simon Hollis and Simon W. Moore, A Method of Thwarting EM Probe Attacks on IC Interconnect, PREP 2005. PDF version

PhD Thesis

Simon J. Hollis, Pulse-based, On-chip Interconnect, University of Cambridge, Computer Laboratory, June 2007. Technical Report version

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