This project will develop image processing inspection algorithms to find defects as small as 50 nm on semiconductor reticles which are used to print the circuits on semiconductor wafers. The technique is aimed at wafer steppers using 193 nm exposure wavelengths and Next Generation Lithography (NGL) tools. It will find defects on reticles such as UV induced defects, particles, electrostatic damage and crystal growth. This technology is essential for semiconductor geometries on wafers to go below 200 nm.

The techniques which exist today are limited to finding reticle defects of typically 300 nm or larger, are too slow to inspect all reticles and often cannot inspect the small geometries of today's lithography. They will be completely unable to cope with the leading edge needs of five years time.

Small defects on reticles will be a serious problem for low k factor lithography such as the 193 nm tools and an even greater problem for subsequent generations such as SCALPEL where the use of a pellicle to protect the reticle may not be possible. These defects will occur in increasing numbers in the wafer fab and inspection of the reticle in the mask shop at the time of production will not be sufficient to ensure that the reticle remains defect free throughout its life. These future lithography techniques will not be suitable for production environments unless there is a technique available to verify that the reticle has not degraded. As the industry moves to 300 mm wafers with a large number of single die reticles, a single defect on a reticle will cause catastrophic yield loss. It will be necessary to inspect reticles every time they are used to find even the smallest defects. The wafer fab will thus need a very fast and sensitive reticle inspection technique.

The aim of this research project is to develop algorithms which will find defects in the image of the circuit pattern without the need for a reference image. By using the device design rules and modelling the imaging process, it is possible to transform the image and separate the circuit pattern from the defects. This technique does not exist in any commercially available equipment.

The project is financially supported through an EPSRC CASE collaboration with KLA-Tencor which is the world leader in yield management and process control solutions for semiconductor manufacturing and related industries. An S&P 500 company, KLA-Tencor has an annual turnover of over $1b and over 4,000 employees worldwide. Company headquarters are located in San Jose, California, with offices worldwide. The company developed its first image processing based, automated inspection system for photomasks 20 years ago.