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3. Arithmetic

Here are a couple of examples to show how the Transputer handles arithmetic. The registers Areg, Breg, Creg are used as a stack, rather like early calculators, to hold intermediate results.

A simple sum Top

Now is the time to load the first example program into the simulator. Press the load button and choose the arith1 program which you should then see loaded into the Code panel as:

         42    ldc 2
         43    ldc 3
         f5    add

The program on the right is written in the Transputer's assembly language. To the left of each of the three instructions, in a yellow box, is the translation of the instruction into machine code.

In the code 42 for the first instruction, the first hex digit 4 (binary 0100) is the code for ldc (load constant), and the second digit 2 is the operand.

If you press the step button, you will see the number 2 appear in Areg, the first item in the register panel.. You will also see the number in Iptr (the instruction pointer register) increase from 0 to 1 to indicate that the first byte, byte 0, of the code has been executed, and that byte 1 will be executed next. The current value of Iptr is also reflected by the red marker line in the Code panel.

The second instruction is very similar. Pressing the step button loads the number 3 into the Areg. The old value 2 in the Areg has been copied into the Breg at the same time, so that it is not lost.

The third instruction illustrates the format of arithmetic operations, which have no operand. They always act on the Areg and Breg. In the code f5 for add, the first digit f (binary 1111) is a code which specifies that an arithmetic operation is to be performed, while the second digit 5 specifies which one (5 is add).

Only load and store instructions, and a few others, have an operand, and this operand is often a very small number. This allows a large percentage of the most common instructions to be stored in a single byte. In addition, there is an extension mechanism for multi-byte instructions, so that operands can be as big as you like, and there can be as many instructions as you like, so that there is no loss of expressiveness compared to more complicated processors.

An expression Top

Suppose you want to calculate the expression:

         (5+1) * (3+4)
Load the arith2 program into the simulator. You should see:

         45    ldc 5
         41    ldc 1
         f5    add
         43    ldc 3
         44    ldc 4
         f5    add
         f3    mul

Press step repeatedly to see the effect of the instructions one by one. The first two load 5 and 1 into Areg and Breg, and the add instruction adds them to get 6.

The next two ldc instructions load 3 and 4 into Areg and Breg, pushing the 6 down into Breg and then Creg. It is a general rule that every time something is loaded into Areg, the old values in Areg and Breg are pushed down into Breg and Creg. If there was anything in Creg, it is lost.

The following add instruction adds the 3 to the 4 to get 7, and at the same time pops the 6 up from Creg into Breg. The general rule is that when an operation combines Areg and Breg, the original items are lost, the answer goes in Areg, and Creg is popped up into Breg.

The final mul instruction is two bytes long (25 followed by f3). It multiplies the 6 and 7 to get the final answer 42. The general rules for forming multi-byte instructions will be explained in later chapter.

The registers Areg, Breg and Creg form a stack. Every instruction notionally pops off the stack the items that it is going to work on, then pushes its result back onto the stack. This stack arrangement is what allows most of the instructions to have no operands. The arrangement is like some programmable calculator languages (though such languages are much more limited).

Other arithmetic instructions besides add and mul are sub (subtract), div (divide) which does an integer division and discards any remainder, and rem (remainder) which finds the remainder after integer division. There is also a full set of floating point instructions etc which we will ignore.

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Copyright 1998 University of Bristol. All rights reserved.
Author: Ian Holyer
Last modified: 14 Sep 1998 11:31
Authored in CALnet