I am a PhD student in the Microelectronics Research Group in the Department of Computer
Science at the University of Bristol, under the supervision of Simon Hollis and
I am interested generally in computer architecture and my work investigates
architectural models for highly parallel computation.
I'm working on an experimental implementation of a language and
As an undergraduate I completed a research project entitled Universal routing in processor networks, which
investigated approaches to routing in irregular networks of processors. The
source code and documentation for the network simulator developed for this
project is available.
Fast distributed process creation with the XMOS XS1 Architecture
James Hanlon and Simon J. Hollis, in proc. Communicating Process Architectures 2011, 33 (pp. 195-207), 2011.
Dynamic generation of parallel computations
James Hanlon and Simon J. Hollis, in proc. UK Electronics Forum 2010, (pp. 7-17), 2010.
XK-XMP-64 performance measurements
Scalable data abstractions for distributed parallel computations,
Imperial College, London. January 2013. [Slides
The resurgence of parallel programming languages,
BCS Advanced Programming Specialist Group. April 2012, London. [Slides