Mentor Graphics is a leader in software and hardware solutions for the development of electronic circuits in the EDA market. Mentor's portfolio includes products, consulting and support services, for some of the most successful manufacturers of electronics and semiconductors in the world.
Students from the departments of Computer Science & Electrical Engineering are invited to lunch with senior members of the team. Pizza will be provided, and the session will include a presentation by Senior Application Engineer Paul Hudson, and a chance to discuss career opportunities at Mentor Graphics.
Paul's talk will focus on how the requirements for design are changing with each process node. At each process node, more manufacturing knowledge must be reflected into physical design decisions, and design rules are becoming more complex. Yesterday’s recommended rules are becoming tomorrow’s required rules. The traditional isolation between physical design and manufacturing enforced by design rules checks is breaking down, and designers must take greater responsibility for subtle layout optimisations to ensure sufficient manufacturing yields.
To ease the designer’s job, Design-For-Manufacturing (DFM) analysis needs to be integrated directly into the physical design and verification flows to automate needed improvements, to reduce time to tapeout, to manage the complexity of sophisticated design rules and to ensure timing closure based on real "as built" device and interconnect models. This session will inform designers about the latest ways to deal with 2D and 3D variability, and will describe how DFM optimisations are changing and being integrated into the physical design process.
Wednesday 22nd April 2009 at 12 noon, Room 1.11a, MVB
Please register your attendance via email with Caroline Higgins by 5pm on Friday 17th April 2009.