- Efficient implementation of cryptography (software and hardware)
- Instruction set extensions/microarchitectural processor enhancements for cryptography
- Implementation attacks and countermeasures
- Secure processors
- System security
- VAM2 virtual lab (hardware implementations) leader in European Network of Excellence in Cryptology (ECRYPT)
- VAM2 virtual lab (physical security) co-leader in European Network of Excellence in Cryptology II (ECRYPT II)
- Program committee member of FDTC 2009, FutureTech 2010, CHES 2010, WESS 2010, Mobisec 2010, Mobisec 2011, ANSEC 2012
- Reviewer for ACM TRETS, ACTA JCA, ASP JOLPE, Elsevier IVLSIJ, Elsevier JCS, Elsevier JSS, EURASIP JES, IEEE TC, IEEE TVLSIS, IET Information Security, JCST, CHES 2005, ISH 2005, CHES 2006, Asiacrypt 2007, CHES 2007, CHES 2008, CT-RSA 2008, FSE 2008, CHES 2009, Eurocrypt 2009, FDTC 2009, FSE 2009, CHES 2010, COSADE 2010, CT-RSA 2010, FutureTech 2010, Mobisec 2010, Latincrypt 2010, WESS 2010 Mobisec 2011, ACNS 2012, FSE 2012, ISPEC 2012,
- 2003: Master's thesis: "Evaluation of Side-Channel Attack Resistivity with Rapid Prototyping"
- 2004-2006: Member of ISEC project group at IAIK/TU Graz
- 2004-2006: Member of SCARD project group at IAIK/TU Graz
- 2006-2008: Member of SMEPP project group at IAIK/TU Graz
- 2008: PhD thesis: "Instruction Set Extensions for Support of Cryptography on Embedded Systems"
- 2008-2010: Member of POWER-TRUST project group at IAIK/TU Graz
- since 2010: Member of AMCPA project group at University of Bristol
|1992-1997||Commercial academy (BHAK) Krems, Austria.|
|1998-2003||Study of Telematics (5-year Master's course) at Graz University of Technology, Austria.|
|2004-2008||PhD study at Graz University of Technology, Austria.|
|2008-2010||Post-doc work as project senior scientist at IAIK/TU Graz.|
|since 2010||Post-doc work as research associate at University of Bristol.|
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