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VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2m)Using Dual Bases

H Rahaman, Jimson Mathew, A. M. Jabir, Dhiraj Pradhan, VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2m)Using Dual Bases . Lecture note in Computer Science (LNCS) , Springer. ISSN 0302-9743, pp. 258–269. July 2012. No electronic version available.

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