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Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories

Costas Argyrides, Hamid Zarandi, Dhiraj Pradhan, Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories. 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07). September 2007. No electronic version available.

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