Multimedia data provides particular challenges for systems interconnect. Although high throughputs are required, e.g. for multiple video streams, low and predictable latency and round-trip times are also needed, e.g. for duplex voice communication. Most interconnects have high latency-bandwidth products, which forces a compromise. Interconnects based on IEEE 1355 have low inherent buffering, which translates to a low latency-bandwidth product, thus providing the basis for a variety of services for different categories of multimedia data. Serial wormhole routing chips of valency 32 have been available for several years, providing paths with implicit flow control with very low per path buffering. An extensive study of networks of these devices has been performed to characterise their latency, throughput and delay variation over many network topologies. Networks of up to 1024 100Mbits/s terminal nodes have been simulated, constructed and measured, demonstrating properties that are beneficial for the construction of scalable infrastructures for high performance multimedia switches, including a rapid indication of internal contention that can be used to effectively manage the quality of service across the switch. We will present the major results of the study and outline how they can be used to design low cost-per-port scalable switches with the potential for the modular addition of fault tolerance.