Publications by Jawar Singh
This is a list of all publications (co-)authored by Jawar Singh that are contained in the publications database of the Department of Computer Science, University of Bristol. To perform an alternative search of the publications database, please go to the publications database home page.
- Andrew Ricketts, Jawar Singh, Vijaykrishnan Narayanan, Dhiraj Pradhan, Investigating the Impact of NBTI on Different Power Saving Cache Strategies. To appear in the proceedings of IEEE International Conference, DATE, 2010, Germany. March 2010. PDF, 274 Kbytes.
- Jawar Singh, K. Ramakrishnan , S. Mookerjea, S. Datta, V. Narayanan, Dhiraj Pradhan, A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application. To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010.. January 2010. No electronic version available.
- S. Mookerjea, A. Liu, S. Datta, D. Mohata, R. Krishnan, Jawar Singh, A. Vallett, A. Ali, T. Mayer, V. Narayanan, D. Schlom, Experimental Demonstration of 100nm Channel Length In0.53Ga0.47As-based Vertical Inter-band Tunnel Field Effect Transistors (TFETs) for Ultra Low-Power Logic and SRAM Applications. To appear in the proceedings of IEEE International Electron Devices Meeting (IEDM), December, Baltimore, 2009. December 2009. No electronic version available.
- J Singh, D K Pradhan, S Hollis, S P Mohanty, J Mathew, Single Ended 6T SRAM with Isolated Read-Port for Low-Power Embedded Systems. 12th IEEE International Conference on Design Automation and Test in Europe (DATE), 2009. April 2009. No electronic version available.
- Jawar Singh, Jimson Mathew, S. P. Mohanty, Dhiraj Pradhan, Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. IEEE International Conference on VLSI Design, pp. 307–312. February 2009. No electronic version available.
- Jawar Singh, Dhiraj Pradhan, Simon Hollis, Saraju Mohanty, A Single Ended 6T SRAM Cell Design for Ultra-Low-Voltage Applications . IEICE Electronics Express, 5(18). ISSN 1349-2543, pp. 750–755. September 2008. PDF, 1109 Kbytes. External information
- Jawar Singh, Jimson Mathew, Dhiraj Pradhan, Failure Analysis for Ultra Low Power Nano-CMOS SRAM Under Process Variations. IEEE International System On Chip Conference (SOCC’ 2008). . September 2008. No electronic version available.