Publications by Costas Argyrides

This is a list of all publications (co-)authored by Costas Argyrides that are contained in the publications database of the Department of Computer Science, University of Bristol. To perform an alternative search of the publications database, please go to the publications database home page.

2009

• Costas Argyrides, Pedro Reviriego, Juan A. Maestro, Dhiraj Pradhan, A novel error correction technique for adjacent errors. 10th European Conference on Radiation Effects on Components and Systems – RADECS 2009. September 2009. No electronic version available.
• Costas Argyrides, Giorgos Dimosthenous, Carlos Lisboa, Luigi Carro, Dhiraj Pradhan, Reliability Aware Yield Improvement Technique for Nanotechnology Based Circuits. 22nd annual symposium on Integrated circuits and system design SBCCI ‘09. July 2009. No electronic version available.
• Costas Argyrides, Carlos Lisboa, Luigi Carro, Dhiraj Pradhan, A Fast Error Correction Technique for Matrix Multiplication Algorithms. International Online Testing Symposium (IOLTS 09). July 2009. No electronic version available.
• Jimson Mathew, A Jabir, H. Rahaman, Costas Argyrides, Dhiraj Pradhan, On the Synthesis of Bit-Parallel Galois Field Multipliers with On-line SEC and DED. , . July 2009. No electronic version available.
• Costas Argyrides, Dhiraj Pradhan, Multiple Event Upsets Aware FPGAs Using Protected Schemes. Dagstuhl Seminar Proceedings on Fault-Tolerant Distributed Algorithms on VLSI Chips. March 2009. No electronic version available.
• Costas Argyrides, Carlos Lisboa, Luigi Carro, Dhiraj Pradhan, Single Element Correction in Sorting Algorithms with Minimum Delay Overhead. At the 10th IEEE Latin-American Test Workshop (LATW09). March 2009. No electronic version available.
• Costas Argyrides, Carlos Lisboa, Ahmad Al Yamani, Luigi Carro, Dhiraj Pradhan, Increasing Memory Yield in Future Technologies through Innovative Design. IEEE International Symposium on Quality Electronic Design. (ISQED 09) . March 2009. No electronic version available.
• Costas Argyrides, Carlos Arthur Lisboa, Luigi Carro, Dhiraj Pradhan, Minimizing the Recomputation Time in Soft Error Tolerant Matrix Multiplication Algorithms. 1st HiPEAC Workshop on Design for Reliability (DFR’09). January 2009. No electronic version available.

2008

• Costas Argyrides, H. Zarandi, Dhiraj Pradhan, Multiple SEU Tolerance in LUTs of FPGAs Using Protected Schemes. 9th European Conference on Radiation Effects on Components and Systems – RADECS 2008. September 2008. No electronic version available.
• Costas Argyrides, Fabian Vargas, Dhiraj Pradhan, Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. IEEE International On-Line Testing Symposium. July 2008. No electronic version available.
• Costas Argyrides, Stephania Loizidou Himona, Dhiraj Pradhan, Yield Improvement and Power Aware Low Cost Memory Chips. Proceedings of Computing Frontiers 2008. May 2008. No electronic version available.
• Costas Argyrides, Stephania Loizidou Himona, Dhiraj Pradhan, Area Reliability trade-off in Improved Reed Muller Coding. SAMOS VIII . April 2008. No electronic version available.
• Carlo Lisboa, Costas Argyrides, Dhiraj Pradhan, Luigi Carro, Algorithm Level Fault Tolerance: a Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. IEEE VLSI Test Symposium (VTS) 2008, . April 2008. No electronic version available.
• Costas Argyrides, Fabian Vargas, Dhiraj Pradhan, Merging Built-in Current Sensor with H-Tree Architecture for SRAM Reliability Improvement. IEEE Latin American Test Workshop (LATW 08). February 2008. No electronic version available.
• Jimson Mathew, Costas Argyrides, A. Jabir, Dhiraj Pradhan, Single Error Correcting Finite Field Multipliers over GF(2m). 21st Conference on VLSI Design VLSI 08. January 2008. No electronic version available.

2007

• Costas Argyrides, Ahmad Al-Yamani, Dhiraj Pradhan, “High Defect Tolerant Low Cost Memory Chips. 20th IEEE International System On Chip Conference (SOCC’ 2007). September 2007. No electronic version available.
• Costas Argyrides, Dhiraj Pradhan, Improved Decoding Algorithm for High Reliable Reed Muller Coding. 20th IEEE International System On Chip Conference (SOCC’ 2007). September 2007. No electronic version available.
• Costas Argyrides, Hamid Zarandi, Dhiraj Pradhan, Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories. 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07). September 2007. No electronic version available.
• Costas Argyrides, Carlo Lisboa, Luigi Carro , Dhiraj Pradhan, A Novel Soft Error Tolerant Low Power RAM Architecture. 20th annual symposium on Integrated circuits and system design SBCCI '07. September 2007. No electronic version available.
• Costas Argyrides, Dhiraj Pradhan, Highly Reliable Power Aware Memory Design. EEE International On-Line Testing Symposium 2007 (IOLTS). July 2007. No electronic version available.
• Costas Argyrides, High Defect Tolerant Robust Memory Designs. DSN Student Forum. June 2007. No electronic version available.
• H.R. Zarandi, S.G. Miremadi, Costas Argyrides, Dhiraj Pradhan, CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs ,. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS). May 2007. No electronic version available.
• Costas Argyrides, H.R. Zarandi, Dhiraj Pradhan, Multiple Upsets Tolerance in SRAM Memory. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS). May 2007. No electronic version available.
• H.R. Zarandi, S.G. Miremadi, Costas Argyrides, Dhiraj Pradhan, Online Detection and Correction of Soft-Errors in LUTs of SRAM-based FPGAs. Proceedings of European Test Symposium (ETS). May 2007. No electronic version available.
• Costas Argyrides, H.R. Zarandi, Dhiraj Pradhan, “Efficient Method to Tolerate Multiple Bit Upsets in SRAM Memory”. Proceedings of European Test Symposium (ETS). May 2007. No electronic version available.
• H.R. Zarandi, S.G. Miremadi, Costas Argyrides, Dhiraj Pradhan, Fast SEU Detection and LUT Configuration Bits of SRAM-based FPGAs,. Proceedings of 14th IEEE Reconfigurable Architecture Workshop, in associated with IPDPS. March 2007. No electronic version available.
• Costas Argyrides, Demetriou S, Dhiraj Pradhan, Fast Reed Muller Decoding for Multi-Bit Upset Aware Memory Designs. Proccedings of Latin American Test Workshop (LATW). March 2007. No electronic version available.
• Costas Argyrides, Ramsundar S, Ahmnad Al-Yamani, Dhiraj Pradhan, Non-square Meshes for Improved Yield in Nanotechnology Circuits. Proccedings of Latin American Test Workshop. March 2007. No electronic version available.

2006

• Costas Argyrides, Jimson Mathew, Ahmad Al-Yamani, Dhiraj Pradhan, Performance Analysis of an Error Tolerant Low Power Memory Architecture. IEEE International Design and Test Workshop. November 2006. PDF, 333 Kbytes.